This is the best summary I could come up with:
Although the proposal to remove support for Intel’s infamous Itanium architecture - aka Itanic - from Linux was rebuffed in February, just weeks ago, in October, the move was approved for kernel 6.7.
To summarize the summary, when Intel began its EPIC project – no, really, it stands for Explicitly Parallel Instruction Computing [PDF] – the idea of out of order execution (OoOE) in microprocessors was new, and for x86, unproven.
In brief, the concept of OoOE is that processors can break down complex x86 instructions into smaller, RISC-like chunks, resequence them on the fly to run them as fast as possible, and then reassemble the results into the order that the software originally expected.
In 1994, it wasn’t certain that future x86 processors would be able to effectively exploit the instruction level parallelism, or ILP as HP called it [PDF], in machine code.
The Pentium Pro provided the design of the CPU core in the Centrino family of chips from Intel Haifa in Israel, which saved the company from the big, hot, and uncompetitive Netburst architecture of the P4.
The only other VLIW machine that the FOSS desk knows reached the market was Transmeta’s Crusoe – one of our articles about which, ironically, also mentioned Intel’s Fred Pollack.
The original article contains 558 words, the summary contains 209 words. Saved 63%. I’m a bot and I’m open source!
I’m far sadder to see the various MIPS machines starting to lose support than I am for Itanic.
Nah. The current license holder for MIPS announced its death a couple of years ago.
RISC-V is the new hotness.
hoohoo! Linus pulled a scream test and then forced the naysayers to maintain the crap they want. rofl
It seems like NetBSD is working to support Itanium. https://wiki.netbsd.org/ports/ia64/
And good riddance. They were technological marvels, but the continuously slipping release dates made them obsolete the day they were released.
They were interesting, but only good for a very narrow purpose - not really a good thing when the trend back then was going away from special purpose machines toward general purpose.
intel didn’t plan it to be just a special purpose CPU - but it just ended up that way. That they gave their first customers free Alpha workstations for crosscompiling code as that was faster than native compilation should tell you everything you need to know about suitability of itanic as general purpose system.
I never used Itanium, but I’m guessing that the Alpha workstations also ran x86 code faster than the Itaniums. fx!32 was one of DEC’s marvels that they completely forgot to market.
Yeah, but x86 was relatively cheap. Alpha and Itanium were in a similar price range.
At that time Alpha belonged to Compaq - and they stopped Alpha development (and canned quite a few good designs which were pretty much ready to go), expecting they’ll be able to replace it with Itanium.
Were they marvels, though? Itanium made good business sense in that it would cut AMD out of the market, but it was shit technology. Itanium would have also done a good job of cutting GCC out of the compiler market, which is great news for ICC. If everybody had to buy Intel compilers, boy that would have changed the software market.
You shouldn’t be making the compiler guess at conditions-on-the-ground that the CPU should be inferring itself, such as “which data dependencies are in cache and could be running OOO right now?”. You shouldn’t be making the compiler spend instructions and memory bandwidth describing this stuff. You shouldn’t be making code that works well on exactly one generation of CPU, one pipeline design, and is trash on the next generation. Once upon a time, MIPS saved a few gates by making three “delay slots” part of the ISA, and that became an albatross as soon as they weren’t a three stage pipeline. Itanium is all about making that kind of design decision everywhere. Itanium is the Microsoft Word of ISAs, where the spec is “whatever my implementation does is the correct thing”
The immediate failure of the Itanium was the promise that “you are buying a new, more expensive system that runs your current x86 code worse”, and the expectation was that every generation of Itanium would go like that. Just as your software starts getting good, here comes the new chip that will someday make stuff faster, but you will never see that until just about the end of that product cycle.
