hardware26
DC motors have high inductance, meaning that the current going over it will resist to change. When you turn off a pair of nmos, current will likely start flowing over the the other pair, from source to drain. Depending on the spec of your nmos, you may consider using diodes in parallel to nmos to carry this current. Obviously these diodes should be reverse biased during normal operation.
Not answering the question but if you studied in English outside of the UK it may be enough. But you need to certify that you studied in English through https://www.ecctis.com/visasandnationality . That is how I did it, and I think it is easier and can be quicker.
If you are working in a decent workplace, you will receive lots of feedback on your code and what you do. Don’t take it personal and learn from them. Sometimes there are multiple correct answers and yours can be one of them, but each workplace, project and senior colleague has their own concerns and priorities. Sometimes feedback seems to be on a trivial mundane detail, and sometimes it really will be. If you think it is valuable feedback, learn. If you disagree, discuss. Enjoy!
As you said before power on capacitor is discharged. Right after power on capacitor is still discharged, so voltage on capacitor is zero, so reset pin has Vcc. With time capacitor gets charges and voltage across capacitor increases and reset voltage becomes closer and closer to ground, until it is ground. But it is important to consider what happens at power down too. At power down capacitor is charged. If power source becomes high impedance at power down, then reset pin will probably go down to zero in time but may take a bit time depending on what source exactly does. But if power source is connected to zero at power down reset pin will observe minus vcc and slowly go up to 0. If reset pin is sensitive it may be a good idea to protect it with a diode.
Simpsons predicted it once again.
