By your account a 386DX would be an 80-bit
And how do you figure that? The Intel 80386DX did NOT have any 80 bit instructions at all, the built in math co-processor came with i486. The only instructions on a 80386DX system that would be 80 bit would be to add a 80387 math co-processor.
But you obviously don’t count by a few extended instructions, but by the architecture of the CPU as a whole. And in that regard, the Databus is a very significant part, that directly influence the speed and number of clocks of almost everything the CPU does.
The Intel 80386DX did NOT have any 80 bit instructions at all, the built in math co-processor came with i486.
You’re right, I misremembered.
And in that regard, the Databus is a very significant part, that directly influence the speed and number of clocks of almost everything the CPU does.
For those old processors, yes, that’s why the 6502 was 8-bit, for modern processors, though? You don’t even see it listed on spec sheets. Instead, for the external stuff, you see number of memory controllers and PCIe lanes, while everything internal gets mushed up in IPC. “It’s wide enough to not stall the pipeline what more do you want” kind of attitude.
Go look at anything post-2000: 64 bit means that pointers take up 64 bits. 32 bits means that pointers take up 32 bits. 8-bit and 16-bit are completely relegated to microcontrollers, I think keeping the data bus terminology, and soonish they’re going to be gone because everything at that scale will be RISC-V, where “RV32I” means… pointers. So does “RV64I” and “RV128I”. RV16E was proposed as an April Fool’s joke and it’s not completely out of the question that it’ll happen. In any case there won’t be RV8 because CPUs with an 8-bit address bus are pointlessly small, and “the number refers to pointer width” is the terminology of <currentyear>. An RV16 CPU might have a 16 bit data bus, it might have an 8 bit data bus, heck it might have a 256bit data bus because it’s actually a DSP and has vector instructions. Sounds like a rare beast but not entirely nonsensical.
You don’t even see it listed on spec sheets.
Doesn’t mean it’s any less important, it’s just not a good marketing measure,because average people wouldn’t understand it anyway, and it wouldn’t be correct to measure by the Databus alone.
As I stated it’s MORE complex today, not less, as the downvoters of my posts seem to refuse to acknowledge. The first Pentium had a 64 bit Databus for a 32 bit CPU. Exactly because data transfer is extremely important. The first Arm CPU was designed around as fast RAM access/management as possible, and it beat the 386 by several factors, with a tenth the transistors.
Go look at anything post-2000: 64 bit means that pointers take up 64 bits. 32 bits means that pointers take up 32 bits.
Although true, this is a very simplistic way to view it, and not relevant to the actual overall bitwith of the CPU, as I’ve tried to demonstrate, but people apparently refuse to acknowledge.
But bit width of the Databus is very important, and it was debated heavily weather it was even legal to market the M68008 Sinclair QL as a 32 bit computer, because it only had an 8 bit databus.
But as I stated other factors are equally important, and the decoder is way more important than the core instruction set, and modern higher end decoders operate at 256 bit or more, allowing them to decode multiple ( 4 ) instructions per cycle, again allowing each core to execute multiple instructions per clock, in 2 threads. Without that capability, each core would only be about a third as fast.
To claim that the instruction set determines bit wdth is simplistic, and also you yourself argued against it, because that would mean an i486 would be an 80 bit CPU. And obviously todays CPU’s would be 512 bit, because they have 512 bit instructions.
Calling it 64 bit is exclusively meant to distinguish newer CPU’s from older 32 bit CPUS, and we’ve done that since the 90’s, claiming that new CPU architectures haven’t increased in bit width for 30 years is simply naive and false, because they have in many more significant ways than the base instruction set.
Still I acknowledge that an AARCH64 or AMD64 or i64 CPU are generally called 64 bit, it was never the point to refute that. Only that it’s a gross simplification of what modern CPU’s have become, and that it’s not technically correct.
Let me finish with a question:
With a multi-core CPU where each core is let’s just say 64 bit, how many bits is the whole CPU package? Which is what we call the “CPU” today, when saying CPU we are not generally talking about the individual cores, because then it would have to be plural.
As I stated it’s MORE complex today, not less, as the downvoters of my posts seem to refuse to acknowledge.
The reason you’re getting downvoted is because you’re saying that “64-bit CPU” means something different than is universally acknowledged that it means. It means pointer width.
Yes, other numbers are important. Yes, other numbers can be listed in places. No, it’s not what people mean when they say “X-bit CPU”.
claiming that new CPU architectures haven’t increased in bit width for 30 years is simply naive and false, because they have in many more significant ways than the base instruction set.
RV128 exists. It refers to pointer width. Crays existed, by your account they were gazillion-bit machines because they had quite chunky vector lengths. Your Ryzen does not have a larger “databus” than a Cray1 which had 4096 bit (you read that right) vector registers. They were never called 4096 bit machines, they Cray1 has a 64-bit architecture because that’s the pointer width.
Yes, the terminology differs when it comes to 8 vs. 16-bit microcontrollers. But just because data bus is that important there (and 8-bit pointers don’t make any practical sense) doesn’t mean that anyone is calling a Cray a 4096 bit architecture. You might call them 4096 bit vector machines, and you’re free to call anything with AVX2 a 256-bit SIMD machine (though you might actually be looking at 2x 128-bit ALUs), but neither makes them 64-bit architectures. Why? Because language is meant for communication and you don’t get to have your own private definition of terms: Unless otherwise specified, the number stated is the number of bits in a pointer.
