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131 points
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Everybody in the know, knows that x86 64 bit was held back to push Itanium, Intel was all about market segmentation, which is also why Celeron was amputated on for instance RAM compared to Pentium.
Market segmentation has a profit maximization motive. You are not allowed to use cheap parts for things that you are supposed to buy expensive parts for. Itanium was supposed to be the only viable CPU for servers, and keeping x86 32 bit was part of that strategy.
That AMD was successful with 64 bit, and Itanium failed was Karma as deserved for Intel.

Today it’s obvious how moronic Intel’s policy back then was, because even phones got 64 bit CPU’s too back around 2009.
32 bits is simply too much of a limitation for many even pretty trivial tasks. And modern X86 chips are in fact NOT 64 bit anymore, but hybrids that handle tasks with 256 bits routinely, and some even with 512 bits, with instruction extensions that have become standard on both Intel and AMD

When AMD came with Ryzen Threadripper and Epyc, and prices scaled very proportionally to performance, and none were artificially hampered, it was such a nice breath of fresh air.

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38 points

And modern X86 chips are in fact NOT 64 bit anymore, but hybrids that handle tasks with 256 bits routinely, and some even with 512 bits, with instruction extensions that have become standard on both Intel and AMD

On a note of technical correctness: That’s not what the bitwidth of a CPU is about.

By your account a 386DX would be an 80-bit CPU because it could handle 80-bit floats natively, and the MOS6502 (of C64 fame) a 16-bit processor because it could add two 16-bit integers. Or maybe 32 bits because it could multiply two 16-bit numbers into a 32-bit result?

In reality the MOS6502 is considered an 8-bit CPU, and the 386 a 32-bit one. The “why” gets more complicated, though: The 6502 had a 16 bit address bus and 8 bit data bus, the 368DX a 32 bit address and data bus, the 368SX a 32 bit address bus and 16 bit external data bus.

Or, differently put: Somewhere around the time of the fall of the 8 bit home computer the common understanding of “x-bit CPU” switched from data bus width to address bus width.

…as, not to make this too easy, understood by the instruction set, not the CPU itself: Modern 64 bit processors use pointers which are 64 bit wide, but their address buses usually are narrower. x86_64 only requires 48 bits to be actually usable, the left-over bits are required to be either all ones or all zeroes (enforced by hardware to keep people from bit-hacking and causing forwards compatibility issues, 1/0 IIRC distinguishes between user vs. kernel memory mappings it’s been a while since I read the architecture manual). Addressable physical memory might even be lower, again IIRC. 248B are 256TiB no desktop system can fit that much, and I doubt the processors in there could address it.

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0 points
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By your account a 386DX would be an 80-bit

And how do you figure that? The Intel 80386DX did NOT have any 80 bit instructions at all, the built in math co-processor came with i486. The only instructions on a 80386DX system that would be 80 bit would be to add a 80387 math co-processor.

But you obviously don’t count by a few extended instructions, but by the architecture of the CPU as a whole. And in that regard, the Databus is a very significant part, that directly influence the speed and number of clocks of almost everything the CPU does.

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4 points

The Intel 80386DX did NOT have any 80 bit instructions at all, the built in math co-processor came with i486.

You’re right, I misremembered.

And in that regard, the Databus is a very significant part, that directly influence the speed and number of clocks of almost everything the CPU does.

For those old processors, yes, that’s why the 6502 was 8-bit, for modern processors, though? You don’t even see it listed on spec sheets. Instead, for the external stuff, you see number of memory controllers and PCIe lanes, while everything internal gets mushed up in IPC. “It’s wide enough to not stall the pipeline what more do you want” kind of attitude.

Go look at anything post-2000: 64 bit means that pointers take up 64 bits. 32 bits means that pointers take up 32 bits. 8-bit and 16-bit are completely relegated to microcontrollers, I think keeping the data bus terminology, and soonish they’re going to be gone because everything at that scale will be RISC-V, where “RV32I” means… pointers. So does “RV64I” and “RV128I”. RV16E was proposed as an April Fool’s joke and it’s not completely out of the question that it’ll happen. In any case there won’t be RV8 because CPUs with an 8-bit address bus are pointlessly small, and “the number refers to pointer width” is the terminology of <currentyear>. An RV16 CPU might have a 16 bit data bus, it might have an 8 bit data bus, heck it might have a 256bit data bus because it’s actually a DSP and has vector instructions. Sounds like a rare beast but not entirely nonsensical.

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-14 points
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By your account a 386DX would be an 80-bit CPU because it could handle 80-bit floats natively,

No that’s not true, it’s way way more complex than that, some consider the data bus the best measure, another could be decoder. I could also have called a normal CPU bitwidth as depending on how many cores it has, each core handling up to 4 instructions per cycle, could be 256 bit, with an average 8 core CPU that would be 2048 bit.

There are several ways to evaluate like Databus, ALU, Decoder etc, but most ways to measure it reasonably hover around the 256 bit, and none below 128 bit.
There is simply no reasonable way to argue a modern Ryzen CPU or Intel equivalent is below 128 bit.

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19 points

There is simply no reasonable way to argue a modern Ryzen CPU or Intel equivalent is below 218 bit.

There absolutely is, and the person you responded to made it incredibly clear: address width. Yeah, we only use 48-bit addresses, but addresses are 64-bit, and that’s the key difference that the majority of the market understands between 32-bit and 64-bit processors. The discussion around “32-bit compatibility” is all about address size.

And there’s also instruction size. Yes, the data it operates on may be bigger than 64-bit, but the instructions are capped at 64-bit. With either definition, current CPUs are clearly 64-bit.

But perhaps the most important piece here is consumer marketing. Modern CPUs are marketed as 64-bit (based on both of the above), and that’s what the vast majority of people understand the term to mean. There’s no point in coming up with another number, because that’s not what the industry means when they say a CPU is 64-bit or 32-bit.

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22 points

Intel was all about market segmentation

See also: ECC memory.

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1 point

Sometimes for some reason, there’s no limit. Like the cheap i3-8100 can use ECC memory

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2 points

AMD allowed procssors to use ECC memory since Ryzen so the the jig was up.

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21 points

It was also a big surprise when Intel just gave up. The industry was getting settled in for a David v Goliath battle, and then Goliath said this David kid was right.

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15 points

Yes, I absolutely thought Intel would make their own, and AMD would lose the fight.
But maybe Intel couldn’t do that, because AMD had patented it already, and whatever Intel did, it could be called a copy of that.

Anyways it’s great to see AMD finally is doing well and finally is profitable. I just never expected Intel to fail as badly as they are? So unless they fight their way to profitability again, we may be in the same boat again as we were when Intel was solo on X86?

But then again, maybe x86 is becoming obsolete, as Arm is getting ever more competitive.

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11 points

Right, I think the future isn’t Intel v AMD, it’s AMD v ARM v RISC-V. Might be hard to break into the desktop and laptop space, but Linux servers don’t have the same backwards compatibility issues with x86. That’s a huge market.

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13 points

I hated that you had to choose, virtualization or overclocking so much. Among a lot of other forced limitation crap from intel.

A bit like cheap mobile phones had a too small ssd and buying one at least “normal” sized bumped everything else (camera, cpu, etc) up too, including price ofc.

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